december 2009 ?2009 fairchild semiconductor corporation FDMC7660 rev. c1 www.fairchildsemi.com 1 FDMC7660 n-channel powertrench ? mosfet FDMC7660 n-channel powertrench ? mosfet 30 v, 20 a, 2.2 m features max r ds(on) = 2.2 m at v gs = 10 v, i d = 20 a max r ds(on) = 3.3 m at v gs = 4.5 v, i d = 18 a high performance technology for extremely low r ds(on) termination is lead-free and rohs compliant general description this n-channel mosfet is produced using fairchild semiconductor?s advanced powertrench ? process that has been especially tailored to minimize the on-state resistance. this device is well suited for power management and load switching applications common in notebook computers and portable battery packs. applications dc - dc buck converters point of load high efficiency load switch and low side switching g s s s d d d d bottom d d d d s s s g pin 1 top power 33 5 6 7 8 3 2 1 4 mosfet maximum ratings t c = 25c unless otherwise noted thermal characteristics package marking an d ordering information symbol parameter ratings units v ds drain to source voltage 30 v v gs gate to source voltage (note 4) 20 v i d drain current -continuous (package limited) t c = 25c 40 a -continuous (silicon limited) t c = 25c 100 -continuous t a = 25c (note 1a) 20 -pulsed 200 e as single pulse avalanche energy (note 3) 200 mj p d power dissipation t c = 25c 41 w power dissipation t a = 25c (note 1a) 2.3 t j , t stg operating and storage junction temperature range -55 to + 150 c r jc thermal resistance, junction to case 3 c/w r ja thermal resistance, junction to ambient (note 1a) 53 device marking device package reel size tape width quantity FDMC7660 FDMC7660 power 33 13?? 12 mm 3000 units
www.fairchildsemi.com 2 ?2009 fairchild semiconductor corporation FDMC7660 rev.c1 FDMC7660 n-channel powertrench ? mosfet electrical characteristics t j = 25c unless otherwise noted off characteristics on characteristics dynamic characteristics switching characteristics drain-source diode characteristics symbol parameter test conditions min typ max units bv dss drain to source breakdown voltage i d = 250 a, v gs = 0 v 30 v bv dss t j breakdown voltage temperature coefficient i d = 250 a, referenced to 25c 14 mv /c i dss zero gate voltage drain current v ds = 24 v, v gs = 0 v 1 a i gss gate to source leakage current v gs = 20 v, v ds = 0 v 100 na v gs(th) gate to source threshold voltage v gs = v ds , i d = 250 a 1.2 1.7 2.5 v v gs(th) t j gate to source threshold voltage temperature coefficient i d = 250 a, referenced to 25c -6 mv/c r ds(on) static drain to source on resistance v gs = 10 v, i d = 20 a 1.8 2.2 m v gs = 4.5 v, i d = 18 a 2.6 3.3 v gs = 10 v, i d = 20 a, t j = 125c 2.2 3.1 g fs forward transconductance v ds = 5 v, i d = 20 a 163 s c iss input capacitance v ds = 15 v, v gs = 0 v, f = 1mhz 3630 4830 pf c oss output capacitance 1345 1790 pf c rss reverse transfer capacitance 110 165 pf r g gate resistance 0.9 t d(on) turn-on delay time v dd = 15 v, i d = 20 a, v gs = 10 v, r gen = 6 14 25 ns t r rise time 6.8 14 ns t d(off) turn-off delay time 36 58 ns t f fall time 5.7 11 ns q g total gate charge v gs = 0 v to 10 v v dd = 15 v, i d = 20 a 54 86 nc q g total gate charge v gs = 0 v to 4.5 v 24 38 nc q gs gate to source charge 11 nc q gd gate to drain ?miller? charge 5.6 nc v sd source-drain diode forward voltage v gs = 0 v, i s = 20 a (note 2) 0.8 1.2 v v gs = 0 v, i s = 1.9 a (note 2) 0.7 1.2 t rr reverse recovery time i f = 20 a, di/dt = 100 a/ s 45 63 ns q rr reverse recovery charge 25 35 nc notes : 1. r ja is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the s older mounting surface of the drain pins. r jc is guaranteed by design while r ja is determined by the user?s board design. 2. pulse test: pulse width < 300 s, duty cycle < 2.0%. 3. starting t j = 25 c, l = 1 mh, i as = 20 a, v dd = 27 v, v gs = 10 v 4. as an n-channel device, the negative vgs rating is for low duty cycle pulse ocurrence only. no continuous rating is implied a. 53c/w when mounted on a 1 i n 2 p a d o f 2 o z c o p p e r b. 125c/w when mounted on a minimum pad of 2 oz copper
www.fairchildsemi.com 3 ?2009 fairchild semiconductor corporation FDMC7660 rev.c1 FDMC7660 n-channel powertrench ? mosfet typical characteristics t j = 25c unless otherwise noted figure 1. 0.0 0.5 1.0 1.5 2.0 0 50 100 150 200 v gs = 4.5 v v gs = 3.5 v v gs = 3 v v gs = 4 v pulse duration = 80 s duty cycle = 0.5% max v gs = 10 v i d , drain current (a) v ds , drain to source voltage (v) on region characteristics figure 2. 0 50 100 150 200 0.5 1.0 1.5 2.0 2.5 3.0 v gs = 3.5 v pulse duration = 80 s duty cycle = 0.5% max normalized drain to source on-resistance i d , drain current (a) v gs =4 v v gs = 4.5 v v gs = 3 v v gs = 10 v n o r m a l i z e d o n - r e s i s t a n c e vs drain current and gate voltage f i g u r e 3 . n o r m a l i z e d o n r e s i s t a n c e -75 -50 -25 0 25 50 75 100 125 150 0.8 1.0 1.2 1.4 1.6 i d = 20 a v gs = 10 v normalized drain to source on-resistance t j , junction temperature ( o c ) vs junction temperature figure 4. 24681 0 0 5 10 15 t j = 125 o c i d = 20 a t j = 25 o c v gs , gate to source voltage (v) r ds(on) , drain to source on-resistance ( m ) pulse duration = 80 s duty cycle = 0.5% max o n - r e s i s t a n c e v s g a t e t o source voltage figure 5. transfer characteristics 1234 0 50 100 150 200 t j = 150 o c v ds = 5 v pulse duration = 80 s duty cycle = 0.5% max t j = -55 o c t j = 25 o c i d , drain current (a) v gs , gate to source voltage (v) figure 6. 0.2 0.4 0.6 0.8 1.0 1.2 0.1 1 10 100 t j = -55 o c t j = 25 o c t j = 150 o c v gs = 0 v i s , reverse drain current (a) v sd , body diode forward voltage (v) 200 s o u r c e t o d r a i n d i o d e forward voltage vs source current
www.fairchildsemi.com 4 ?2009 fairchild semiconductor corporation FDMC7660 rev.c1 FDMC7660 n-channel powertrench ? mosfet figure 7. 02 04 06 0 0 2 4 6 8 10 i d = 20 a v dd = 20 v v dd = 10 v v gs , gate to source voltage (v) q g , gate charge (nc) v dd = 15 v gate charge characteristics figure 8. 0.1 1 10 0.05 0.1 1 10 f = 1 mhz v gs = 0 v capacitance ( n f ) v ds , drain to source voltage (v) c rss c oss c iss 30 c a p a c i t a n c e v s d r a i n to source voltage figure 9. 0.01 0.1 1 10 100 300 1 10 30 t j = 100 o c t j = 25 o c t j = 125 o c t av , time in avalanche (ms) i as , avalanche current (a) u n c l a m p e d i n d u c t i v e switching capability figure 10. 25 50 75 100 125 150 0 50 100 150 v gs = 4.5 v r jc = 3 o c/w v gs = 10 v i d , drain current (a) t c , case temperature ( o c ) m a x i m u m c o n t i n u o u s d r a i n current vs case temperature f i g u r e 1 1 . f o r w a r d b i a s s a f e operating area 0.01 0.1 1 10 100200 0.01 0.1 1 10 100 300 dc 100 ms 10 ms 1 ms 1s i d , drain current (a) v ds , drain to source voltage (v) this area is limited by r ds ( on ) single pulse t j = max rated r ja = 125 o c/w t a = 25 o c 10s figure 12. 10 -3 10 -2 10 -1 110 100 1000 0.5 1 10 10 2 10 3 single pulse r ja = 125 o c/w t a = 25 o c p ( pk ) , peak transient power (w) t, pulse width (sec) s i n g l e p u l s e m a x i m u m power dissipation typical characteristics t j = 25c unless otherwise noted
www.fairchildsemi.com 5 ?2009 fairchild semiconductor corporation FDMC7660 rev.c1 FDMC7660 n-channel powertrench ? mosfet figure 13. junction-to-ambient transient thermal response curve 10 -3 10 -2 10 -1 11 0 100 1000 0.001 0.01 0.1 1 single pulse r ja = 125 o c/w ( note 1b ) duty cycle-descending order normalized thermal impedance, z ja t, rectangular pulse duration (sec) d = 0.5 0.2 0.1 0.05 0.02 0.01 2 p dm t 1 t 2 notes: duty factor: d = t 1 /t 2 peak t j = p dm x z ja x r ja + t a typical characteristics t j = 25c unless otherwise noted
www.fairchildsemi.com 6 ?2009 fairchild semiconductor corporation FDMC7660 rev.c1 FDMC7660 n-channel powertrench ? mosfet dimensional outline and pad layout
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